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| author | Harley Travis <harleytravis123@outlook.com> | 2026-06-27 11:42:54 -0500 |
|---|---|---|
| committer | Harley Travis <harleytravis123@outlook.com> | 2026-06-27 11:42:54 -0500 |
| commit | 53bcaebb2ee8c12ba327933f534c9343b6f2fbfe (patch) | |
| tree | 6c882e8e3e1962d9434071321acc1c7fda011ff0 | |
| parent | b6ba4cafe95ee3e6eca548ea61f295e2899834d0 (diff) | |
| download | templeos-floppy-driver-53bcaebb2ee8c12ba327933f534c9343b6f2fbfe.tar.gz | |
Update FDCReset
I have patched FDCReset to actually do its job correctly, switching it over to DOR-twiddling instead of the DSR method. I also allowed it to skip the interrupt checks if it gets a 0x80 byte back at any point.
| -rw-r--r-- | Kernel/BlkDev/DskFDC.HC | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/Kernel/BlkDev/DskFDC.HC b/Kernel/BlkDev/DskFDC.HC index 53cdccb..8a68b21 100644 --- a/Kernel/BlkDev/DskFDC.HC +++ b/Kernel/BlkDev/DskFDC.HC @@ -101,20 +101,32 @@ U0 FDCSendByte(CBlkDev *bd,U8 byte) U0 FDCReset(CBlkDev *bd) { // Reset the FDC + I64 i; + U64 dor; + // Prepare the int semaphore fdc_int_semaphore=FALSE; - // Twiddle the reset bit in the DSR - OutU8(bd->base0+FDC_MSR_DSR,0x80|bd->bps); + // Clear the reset and IRQ bits in the DOR + dor=InU8(bd->base0+FDC_DOR)&~(FDC_DOR_DMA+FDC_DOR_REST); + OutU8(bd->base0+FDC_DOR,dor); + + // Wait for a few microseconds + for (i=0;i<4;i++) { + PortNop; + } + + // Set the bits back + dor=dor|(FDC_DOR_DMA+FDC_DOR_REST); + OutU8(bd->base0+FDC_DOR,dor); // Wait for the int - while (!fdc_int_semaphore) - Yield; + while (!fdc_int_semaphore) Yield; - // Send 4 SISes + // Send 4 SISes (or bail if we get 0x80) for (i=0,i<4,i++) { FDCSendByte(bd,FDC_SENSE_INTR) - FDCReadByte(bd); + if (FDCReadByte(bd)=0x80) break; FDCReadByte(bd); } |
