diff options
Diffstat (limited to 'Kernel/KFloppyA.HH')
| -rw-r--r-- | Kernel/KFloppyA.HH | 137 |
1 files changed, 137 insertions, 0 deletions
diff --git a/Kernel/KFloppyA.HH b/Kernel/KFloppyA.HH new file mode 100644 index 0000000..e7065b6 --- /dev/null +++ b/Kernel/KFloppyA.HH @@ -0,0 +1,137 @@ +/* + Copyright (C) 2025-2026 Harley Travis <yoshi128k@gmail.com>. + This software (including source code) is licensed under the BSD Zero Clause + License. See the Copying.TXT file for details. +*/ + +// FDC uses IRQ6 = int 26h +#define I_FDC 0x26 +#define IRQ_FDC 6 + +// FDC regs (primary ctrlr) +#define FDC_STAT_A 0x0 +#define FDC_STAT_B 0x1 +#define FDC_DOR 0x2 +#define FDC_TAPE 0x3 +#define FDC_MSR_DSR 0x4 +#define FDC_DATA 0x5 +#define FDC_CCR_DIR 0x7 + +// FDC cmds +#define FDC_READ_TRACK 0x02 +#define FDC_SPECIFY 0x03 +#define FDC_SENSE_STAT 0x04 +#define FDC_WRITE_DATA 0x05 +#define FDC_READ_DATA 0x06 +#define FDC_RECALIBRATE 0x07 +#define FDC_SENSE_INTR 0x08 +#define FDC_WRITE_DEL 0x09 +#define FDC_READ_ID 0x0A +#define FDC_READ_DEL 0x0C +#define FDC_FMT_TRACK 0x0D +#define FDC_DUMP_REG 0x0E +#define FDC_SEEK 0x0F +#define FDC_VERSION 0x10 +#define FDC_SCAN_EQL 0x11 +#define FDC_PERP_MODE 0x12 +#define FDC_CONFIGURE 0x13 +#define FDC_LOCK 0x14 +#define FDC_VERIFY 0x16 +#define FDC_SCAN_LO_EQL 0x19 +#define FDC_SCAN_HI_EQL 0x1D + +// Motor stuff +#define FDC_MOTOR_OFF 0 +#define FDC_MOTOR_ON 1 +#define FDC_MOTOR_WAIT 2 + +// Read/write directions +#define FDC_DIR_READ 0 +#define FDC_DIR_WRITE 1 + +// Digital Output Register (DOR) flags + +// DOR motor control flags: 1 = on, 0 = off +#define FDC_DOR_MOTD 0x80 // Drive D +#define FDC_DOR_MOTC 0x40 // Drive C +#define FDC_DOR_MOTB 0x20 // Drive B +#define FDC_DOR_MOTA 0x10 // Drive A + +// other DOR flags +#define FDC_DOR_DMA 0x08 // DMA2/IRQ6 On/Off +#define FDC_DOR_REST 0x04 // Controller Reset: this is active low; + // 1 = normal, 0 = reset + +// DOR drive select (DOR & 0x03): selects drive 0-3 + +// Main Status Register (MSR) flags +#define FDC_MSR_RQM 0x80 // Main Request: 1 = ready, 0 = not ready +#define FDC_MSR_DIO 0x40 // Data In/Out: 1 = FDC -> PC, 0 = PC -> FDC +#define FDC_MSR_NDMA 0x20 // Non-DMA: 1 = DMA off, 0 = DMA on +#define FDC_MSR_BUSY 0x10 // Device busy: self-explanatory + +// MSR drive seek flags: 1 = seeking, 0 = idle +#define FDC_MSR_ACTD 0x08 // Drive D +#define FDC_MSR_ACTC 0x04 // Drive C +#define FDC_MSR_ACTB 0x02 // Drive B +#define FDC_MSR_ACTA 0x01 // Drive A + +// Status Register 0 (ST0) flags + +/* ST0 interrupt code (ST0 & 0xC0): + 00 = normal termination + 01 = abnormal termination + 10 = invalid cmd + 11 = abnormal termination by poilling (drive became not ready) +*/ + +#define FDC_ST0_SEEK_END 0x20 // Seek End: seek/calibration completed +#define FDC_ST0_UNIT_CHK 0x10 // Unit Check: drive encountered a fault + // or recalibration failed +#define FDC_ST0_NOT_RDY 0x08 // Not Ready: self-explanatory +#define FDC_ST0_HEAD 0x04 // Active Head + +// ST0 unit select (ST0 & 0x03): same fmt as DOR drive select + +// Status Register 1 (ST1) flags +#define FDC_ST1_END_CYL 0x80 // End of Cylinder: + // set when sector count > sectors on track +// 0x40 is unused +#define FDC_ST1_DATA_ERR 0x20 // Data Error: set when an error is + // detected in a sector's data or ID fields +#define FDC_ST1_TIMEOUT 0x10 // Timeout: set when a data overrun or + // underrun occurs (i.e. the system is not + // reading data fast enough) +// 0x08 is unused +#define FDC_ST1_NO_DATA 0x04 // No Data: set when either a sector cannot + // be read, or an ID cannot be successfully + // read, or if the sector sequence cannot + // be determined +#define FDC_ST1_NO_WRITE 0x02 // Not Writable: set when attempting to + // write to a write-protected disk +#define FDC_ST1_NO_ID 0x01 // No Addr. Mark: set when an ID/(deleted) + // data address mark cannot be found. + +// Status Register 2 (ST2) flags +// 0x80 is unused +#define FDC_ST2_DEL_ADDR_MRK 0x40 // Deleted Addr. Mark: set when a deleted + // DAM or valid DAM is detected during RS + // or RDS, respectively +#define FDC_ST2_CRC_ERR 0x20 // CRC Error: self explanatory +#define FDC_ST2_WRONG_CYL 0x10 // Wrong cyl.: set when the ctrlr cyl does + // not match that in the ID addr mrk +// 0x08 and 0x04 are unused +#define FDC_ST2_BAD_CYL 0x02 // Bad Cylinder: set when track addr in + // sector does not match that on the ctrlr + // and equals 0xFF (meaning it is bad) +#define FDC_ST2_MISSING_DATA 0x01 // Missing Data: set when no DAM or DDAM + // can be found + +// Status Register 3 (ST3) flags +// 0x80 is unused +#define FDC_ST3_W_PROT 0x40 // Write Protected: self explanatory +// 0x20 is unused +#define FDC_ST3_TRK_0 0x10 // Track 0: ditto +// 0x08 is unused +#define FDC_ST3_HEAD_ADDR 0x04 // Head Address: ditto +// 0x02 and 0x01 are drive select |